Electronics

Layoffs at SiFive as RISC-V upstart faces a crossroads


SiFive, a prominent player in the RISC-V design arena, is going through a radical makeup. While layoffs at one of the early RISC-V startups are making headlines in trade media, what’s happening underneath is a significant shift in its business model.

The well-funded RISC-V upstart built its business around two product lines. First, pre-designed and silicon-proven RISC-V cores that designers can pick to develop their system-on-chips (SoCs). SiFive has been shipping these ready-made RISC-V cores along with a debugging tool that can be used to test the reliability of an SoC design before manufacturing.

Figure 1 According to media reports, SiFive is focusing on custom cores for RISC-V processors.

Second, custom cores that SiFive designed with specific requirements; these custom cores are later installed into an SoC. The news behind this layoff story is that SiFive is dumping its low-cost RISC-V core business to focus on custom cores. The Santa Clara, California-based company has telegraphed this shift with the goal to reduce operational complexity in its official statement about staff layoffs.

Still, layoffs have been massive. Though media reports vary on numbers ranging from 100 to more than 300, design engineers have borne the brunt of this restructuring. And here, physical design engineers are most visible. Some engineers are heading to LinkedIn, outlining their expertise in processor design and software development while making known their immediate availability.

Besides engineering, sales and product teams, much of the management has also left SiFive, though company cofounders and CEO Patrick Little are still at the helm. Krste Asanović, Yunsup Lee, and Andrew Waterman—three researchers from the University of California, Berkeley—founded SiFive in 2015. Asanović was the leader of the team at UC Berkeley that defined the instruction set architecture (ISA) for RISC-V processors.

Next year, SiFive became the first company to produce a chip implementing the RISC-V ISA when it unveiled the Freedom Everywhere 310 SoC and the HiFive development board. Though some universities had already produced RISC-V processors by that time.

Figure 2 SiFive has been a prominent presence in the RISC-V industry evolution.

The kneejerk reaction to SiFive layoffs leads to questions about the viability of RISC-V-related businesses. This comes days after news surfaced about potential RISC-V technology restrictions on chip design firms in China. Moreover, RISC-V Summit North America, a gathering of the technology faithful, is just weeks away.

Is it just a crack in SiFive’s business model that the company is trying to address with a massive restructuring, or a lot more severe issues lay beneath the layoffs? EDN will keep you posted as more details emerge on SiFive’s layoffs and its shift toward custom RISC-V cores.

Related Content